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Aniss Djellal

Archives

All the articles I've archived.

2026 2
April 1
  • Trading MatMuls for SRAM Lookups: A 3-Bit Edge Architecture

    By trading heavy FP16 MatMuls for SRAM lookups and 1-bit additions, our custom quantization pipeline squeezes state-of-the-art models down to approx. 3 bits per weight with minimal accuracy loss. Here is how bypassing Tensor Cores could reshape the design of future edge AI chips.

February 1
2025 1
December 1